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ThinkMind // SPACOMM 2015, The Seventh International Conference on Advances in Satellite and Space Communications // View article spacomm_2015_4_30_20063


The Use of Field Programmable Gate Arrays (FPGA) in Small Satellite Communication Systems

Authors:
Kosta Varnavas
William Sims
Joseph Casas

Keywords: Software Defined Radio, Field Programmable Gate Arrays, Programmable Lightweight System Adaptable Radio, PULSAR, Finite Impulse Response Filter, microprocessor, digital signal processor, parallel processing

Abstract:
This paper will describe the use of digital Field Programmable Gate Arrays (FPGA) to contribute to advancing the state-of-the-art in software defined radio (SDR) transponder design for the emerging SmallSat and CubeSat industry and to provide advances for NASA as described in the TAO5 Communication and Navigation Roadmap (Ref 4). The use of software defined radios (SDR) has been around for a long time. A typical implementation of the SDR is to use a processor and write software to implement all the functions of filtering, carrier recovery, error correction, framing etc. Even with modern high speed and low power digital signal processors, high speed memories , and efficient coding , the compute intensive nature of digital filters, error correcting and other algorithms is too much for modern processors to get efficient use of the available bandwidth to the ground. By using FPGAs, these compute intensive tasks can be done in parallel, pipelined fashion and more efficiently use every clock cycle to significantly increase throughput while maintaining low power. These methods will implement digital radios with significant data rates in the X and Ka bands. Using these state-of-the-art technologies, unprecedented uplink and downlink capabilities can be achieved in a ½ U sized telemetry system. Additionally, modern FPGAs have embedded processing systems, such as ARM cores, integrated inside the FPGA allowing mundane tasks such as parameter commanding to occur easily and flexibly. Potential partners include other NASA centers, industry and the DOD. These assets are associated with small satellite demonstration flights, LEO and deep space applications. MSFC currently has an SDR transponder test-bed using Hardware-in-the-Loop techniques to evaluate and improve SDR technologies.

Pages: 86 to 89

Copyright: Copyright (c) The Government of NASA, 2015. Used by permission to IARIA.

Publication date: April 19, 2015

Published in: conference

ISSN: 2308-4480

ISBN: 978-1-61208-397-1

Location: Barcelona, Spain

Dates: from April 19, 2015 to April 24, 2015

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