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ThinkMind // ICSEA 2013, The Eighth International Conference on Software Engineering Advances // View article icsea_2013_14_40_10322
The Impact of Intra-core and Inter-core Task Communication on Architectural Analysis of Multicore Embedded Systems
 Authors: Juraj Feljan Jan Carlson Keywords: software architecture; model-based analysis; multicore embedded systems; task communication; measurement; cache Abstract: In order to get accurate performance predictions, design-time architectural analysis of multicore embedded systems has to consider communication overhead. When communicating tasks execute on the same core, the communication typically happens through the local cache. On the other hand, when they run on separate cores, the communication has to go through the shared memory. As the shared memory has a significantly larger latency than the local cache, we expect a significant difference between intra-core and inter-core task communication. In this paper, we present a series of experiments we ran to identify the size of this difference, and discuss its impact on architectural analysis of multicore embedded systems. In particular, we show that the impact of the difference is much lower than anticipated. Pages: 402 to 407 Copyright: Copyright (c) IARIA, 2013 Publication date: October 27, 2013 Published in: conference ISSN: 2308-4235 ISBN: 978-1-61208-304-9 Location: Venice, Italy Dates: from October 27, 2013 to October 31, 2013
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